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  38 38 12.8 max. 7.0 max. 5.08 max. 1.6 1234 8765 7.62 0.3 2.54 0.25 0.5 0.15 0~15 0.6 max. 2.5 min. 0.8 figure 1) ecs-300cx top and side views oscillator st v dd gnd selector divider f abc select (f1/2-f1/2 8 ) output buffer d f figure 3) ecs-300cx block diagram 38 ecs, inc. international 1105 s. ridgeview, olathe, ks 66062  913-782-7787  800-237-1041  fax 913-782-6991  www.ecsxtal.com oscillators oscillators the ecs-300cx utilizes a built in divider circuit to provide a second divided output. the cmos based oscillator features low current consumption in a standard 8-pin dip package. features ? low current consumption ? built in divider circuit ? 8-pin dip package ? pbfree/rohs compliant ecs-300cx series dual output cmos clock oscillator part numbering guide series frequency (12.000 mhz) ecs-300cx C 120 sample part number: ecs-300cx-120 *see possible frequency divisions table for example of divided frequencies. operating conditions/electrical characteristics parameters conditions minimum typical maximum units primary output 12.000 32.000 mhz frequency range divided output* 48.875 khz 16.000 mhz ppm frequency stability all conditions 100* ppm operating temperature -10? +70? ?c storage temperature -55? +125? ?c input voltage (v cc ) +3.0v +5.0v +5.5v v dc input current 20 ma primary output 40/60 60/40 % output symmetry divided output 48/52 52/48 % rise and fall times 15 ns vol v cc x 0.1 v dc output voltage voh v cc x 0.9 v dc 12.000 ~ 24.576 mhz 50 pf output load 30.000 ~ 32.000 mhz 15 pf 12.000 ~ 24.576 mhz 1.5 ms start up time 30.000 ~ 32.000 mhz 2.0 ms possible frequency divisions by part number fo/2 n (divided output) pin 2 ecs part number fo clock pin 1 1/2 1 1/2 2 1/2 3 1/2 4 1/2 5 1/2 6 1/2 7 1/2 8 ecs-300cx-120 12.000 mhz 6.000 mhz 3.000 mhz 1.500 mhz 750 khz 375 khz 187.5 khz 93.75 khz 46.875 khz ecs-300cx-163 16.384 mhz 8.192 mhz 4.096 mhz 2.048 mhz 1.024 mhz 512 khz 256 khz 128 khz 64 khz ecs-300cx-320 32.000 mhz 16.000 mhz 8.000 mhz 4.000 mhz 2.000 mhz 1.000 mhz 500 khz 250 khz 125 khz input output divider selection c b a st pin 1 (primary output) pin 2 (divided output) x x x l l l l l l h fo clock fo 1/2 1 clock l l h h fo clock fo 1/2 2 clock l h l h fo clock fo 1/2 3 clock l h h h fo clock fo 1/2 4 clock h l l h fo clock fo 1/2 5 clock h l h h fo clock fo 1/2 6 clock h h l h fo clock fo 1/2 7 clock h h h h fo clock fo 1/2 8 clock pin connections #1 output #2 divided output #3 standby #4 gnd #5 a (divider selection) #6 b (divider selection) #7 c (divider selection) #8 v cc figure 2) pin connections figure 4) divided output selection table dimensions (mm) standard frequencies 12.000, 12.288, 12.800, 14.31818, 14.7456, 15.9744, 16.000, 16.384, 17.734476, 18.432, 19.6608, 20.000, 24.000, 24.576, 30.000 and 32.000 mhz


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